Polycrystalline silicon thin film transistors have the potential for extensive applications in large area electronic devices such as flat panel displays, detect, or arrays and image sensors. Recently, studies of polysilicon (poly-Si) thin film transistors have concentrated on methods for reducing their fabrication costs, either by reducing the transistors' processing time or by lowering the processing temperatures.The latter effect is important since it allows the usage of less expensive substrates for the transistor arrays, e.g., glass, plastic, etc. . . For instance, Czubatyj et al. in "Low-Temperature Polycrystalline TFT on 7057 Glass", IEEE Electron Device Letters, Vol. 10, pages 349-351, 1989, demonstrates that polysilicon thin film transistors can be fabricated on 7059 glass substrates using relatively low temperature furnace annealing for crystallization. However, the crystallization process takes longer than 75 hours and is therefore not practically applicable.
Poly-Si films can be deposited, deposited recrystallized, or deposited in the amorphous (a-Si) form and then crystallized into poly-Si films. In the latter approach, the crystallization of the a-Si into poly-Si includes two steps: solid-phase nucleation and grain growth. The grain growth process continues until two growing grains impede each other. Since a nucleation process has a higher thermal activation energy than grain growth, a lower temperature crystallization with fewer nucleating sites (which usually take a longer time create) is needed to obtain a larger grain-size polycrystalline silicon.
There are three principal crystallization processes: furnace annealing, rapid thermal process (RTP) and laser annealing. Although reported laser annealing techniques have the potential for low temperature crystallization, laser crystallization suffers from the need to raster the laser beam; raising throughput issues. Laser annealing also exhibits other difficulties, e.g. reproducibility, uniformity and peel-off. The most commonly used methods for producing large grain poly-Si films are furnace annealing of a-Si films at temperatures&gt;=600 .degree. C., with very long processing times (16-30 hours or longer for a-Si films) or the RTP approach (e.g. 700.degree. C./5 mins).
An inventor hereof in "Low Thermal Budget Poly-Silicon Thin Film Transistors on Glass", Japanese Journal of Applied Physics, Vol. 30, pages L269-L271, 1991 has demonstrated that thin film transistors can be fabricated on poly-Si films made by the crystallization of precursor a-Si films. Those polycrystalline films were obtained by a rapid thermal annealing of the precursor films for five minutes at 700.degree. C. on 7059 glass substrates.
In U.S. Pat. No. 5,147,826 to Liu et al., it is shown that a prior art thermal anneal procedure at 700.degree. C. (for converting a-Si to poly-Si) can be reduced to a range of from 550.degree. C. to 650.degree. C. This improvement is accomplished by depositing a thin discontinuous film of a nucleating site forming material over an already deposited layer of a-Si.
The two contiguous films are then rapidly thermally annealed, with the nucleating site forming material enabling crystallization of the underlying a-Si at temperatures lower than theretofore reported.
Liu et al. also report in the '826 patent that a-Si can be selectively crystallized by depositing the nucleating site performing material in a pattern thereon and subsequently subjecting the patternized surface to an anneal procedure. Because the nucleating site forming material is a metal, the treated surface of the subsequently crystallized silicon is not optimal for structures. As a result, additional processing steps are required to allow untreated surfaces to become boundaries for devices to be grown.
In U.S. Pat. No. 5,275,851 of Fonash et al., a fabrication process for polycrystalline silicon thin film transistors is described that commences with a deposition of an ultra-thin nucleating-site forming layer onto the surface of an insulating substrate (e.g., 7059 glass, plastic). Next, an a-Si film is deposited thereover and the combined films are annealed at temperatures that do not exceed 600.degree. C. By patterning the deposition of the nucleating site forming material on the glass substrate, the subsequently deposited a-Si film can be selectively crystallized only in areas in contact with the nucleating-site forming material.
Accordingly, it is an object of this invention to provide an improved low temperature crystallization procedure for an amorphous semiconductor film.
It is a further object of this invention to provide an improved method for enabling selective crystallization of an amorphous semiconductor film.
It is another object of this invention to provide an improved method for crystallization of an amorphous semiconductor film, including an a-Si film, wherein processing parameters are such as to enable the film to be processed while in place on a glass, silicon or other inexpensive substrates.